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A novel approach to real-time verification of transport system design using FPGA based emulator.
Kazuhiro Hayashi
Toshiaki Miyazaki
Kazuhiro Shirakawa
Kazuhisa Yamada
Takaki Ichimori
Ken-nosuke Fukami
Naohisa Ohta
Published in:
RSP (1996)
Keyphrases
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real time
computer aided
formal verification
low cost
website
optimal design
engineering design
signal processing
high speed
data acquisition
vision system
low power
design decisions
design issues
case study
real time control
functional verification