Power consumption improvement with residue code for fault tolerance on SRAM FPGA.
Frédéric AmielThomas EaVashishtha VinayPublished in: DASIP (2011)
Keyphrases
- power consumption
- fault tolerance
- fault tolerant
- power reduction
- low power consumption
- low power
- error detection
- load balancing
- power saving
- power management
- distributed systems
- energy efficiency
- response time
- energy saving
- peer to peer
- single chip
- mobile agents
- battery life
- low cost
- data center
- high performance computing
- digital signal processing
- power dissipation
- field programmable gate array
- high speed
- ad hoc networks
- data transmission
- signal processing
- real time