High speed bit-serial parallel processing on array architecture.
Kazuhito ItoTakenobu ShimizugashiraHiroaki KuniedaPublished in: ASP-DAC (1997)
Keyphrases
- parallel processing
- high speed
- distributed processing
- parallel architecture
- computational power
- processing units
- processing speed
- parallel computers
- parallel computation
- real time
- focal plane
- low power
- ibm sp
- content addressable memory
- analog to digital converter
- graphic processing unit
- cmos image sensor
- parallel architectures
- random access memory
- pc cluster
- data parallelism
- cmos technology
- parallel execution
- low cost