Improved CMOS (4; 2) compressor designs for parallel multipliers.

Abdoreza Pishvaie Ghassem Jaberipur Ali Jahanian

Published in: Comput. Electr. Eng. (2012)

Keyphrases

high speed
parallel processing
low cost
parallel implementation
data sets
learning algorithm
parallel algorithm
low power
improved algorithm
shared memory
analog vlsi
nm technology