Linearization of CMOS LNA's via optimum gate biasing.

Vladimir Aparin Gary Brown Lawrence E. Larson

Published in: ISCAS (4) (2004)

Keyphrases

cmos technology
nm technology
gate dielectrics
low power
low cost
high speed
metal oxide semiconductor
power supply
global optimum
power consumption
analog vlsi
nano scale
parallel processing
circuit design
website
action selection
delay insensitive
multiple input
low voltage
hd video
multi objective