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Power efficiency of switch architecture extensions for fault tolerant NoC design.
Alberto Ghiribaldi
Alessandro Strano
Michele Favalli
Davide Bertozzi
Published in:
IGCC (2012)
Keyphrases
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fault tolerant
fault tolerance
distributed systems
design methodology
management system
fault isolation
design process
load balancing
software architecture
multi processor
state machine
high assurance
shortest path
power consumption
access control
high availability
packet switched