An Off-Chip Attack on Hardware Enclaves via the Memory Bus.
Dayeol LeeDongha JungIan T. FangChia-che TsaiRaluca Ada PopaPublished in: USENIX Security Symposium (2020)
Keyphrases
- low cost
- high speed
- processor core
- memory subsystem
- memory access
- vlsi implementation
- multithreading
- ibm zenterprise
- computing power
- digital signal processors
- host computer
- memory bandwidth
- single chip
- speculative execution
- programmable logic
- internal memory
- circuit design
- direct memory access
- memory management
- level parallelism
- hardware and software
- evolvable hardware
- parallel hardware
- operating system
- real time
- virtual memory
- memory hierarchy
- random access memory
- gigabit ethernet
- low power
- memory requirements
- data acquisition
- chip design
- ibm power processor
- computational power
- embedded systems
- input output
- hardware implementation
- data corruption
- signal processor
- associative memory
- processing elements
- main memory
- computing systems
- shared memory
- high density
- low power consumption
- random access
- floating point arithmetic
- content addressable memory
- image sensor
- hardware architecture