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The design and verification of a VLSI chip for electrocardiogram data compression.
Subhash C. Roy
William T. Krakow
B. Sacks
William E. Batchelor
L. N. Bohs
Roger C. Barr
Published in:
CBMS (1990)
Keyphrases
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data compression
single chip
functional verification
chip design
high speed
vlsi design
compression algorithm
circuit design
data reduction
multi dimensional
compression scheme
design methodology
compressed data
power dissipation
low power
vlsi implementation