Localized Verification of Circuit Descriptions.
Jørgen StaunstrupStephen J. GarlandJohn V. GuttagPublished in: Automatic Verification Methods for Finite State Systems (1989)
Keyphrases
- asynchronous circuits
- high speed
- model checking
- analog circuits
- circuit design
- verification method
- high level
- signature verification
- formal verification
- face verification
- logic circuits
- handwritten signature verification
- database
- analog vlsi
- delay insensitive
- false acceptance rate
- concurrent systems
- single phase
- formal methods
- low power
- knowledge base