Login / Signup
A high stable 8T-SRAM with bit interleaving capability for minimization of soft error rate.
Debasish Nayak
Debiprasad Priyabrata Acharya
Prakash Kumar Rout
Umakanta Nanda
Published in:
Microelectron. J. (2018)
Keyphrases
</>
error rate
test set
random access memory
lower error rates
misclassification rate
false discovery rate
information theoretic
cost sensitive classification
correct recognition rate
support vector machine
power consumption
rule sets
information theory
equal error rate
word error rate