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A 7Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS.
Raghavan Kumar
Vikram B. Suresh
Sachin Taneja
Mark A. Anders
Steven Hsu
Amit Agarwal
Vivek De
Sanu Mathew
Published in:
VLSI Technology and Circuits (2022)
Keyphrases
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high speed
power consumption
vlsi circuits
power supply
low cost
analog vlsi
circuit design
computer architecture
low power
single chip
update rule
air fuel ratio
image sensor
encryption algorithm
delay insensitive
access control
real time
advanced encryption standard