Constant complexity scheduling for hardware multitasking in two dimensional reconfigurable field-programmable gate arrays.
S. RomanHortensia MechaDaniel MozosJulio SeptiénPublished in: IET Comput. Digit. Tech. (2008)
Keyphrases
- field programmable gate array
- hardware implementation
- embedded systems
- programmable logic
- parallel computing
- fpga implementation
- hardware design
- hardware architecture
- computing systems
- digital signal processing
- image processing algorithms
- hardware software co design
- reconfigurable hardware
- software implementation
- fpga technology
- low cost
- hardware software
- scheduling problem
- parallel architectures
- massively parallel
- hardware and software
- hardware description language
- hw sw
- application specific integrated circuits
- digital signal processors
- host computer
- high end
- scheduling algorithm
- signal processing
- parallel machines
- heterogeneous computing
- xilinx virtex
- clock frequency
- parallel processors