CORDIC Arithmetic for an SVD Processor.
Joseph R. CavallaroFranklin T. LukPublished in: J. Parallel Distributed Comput. (1988)
Keyphrases
- singular value decomposition
- digital computer
- high speed
- instruction set
- parallel processing
- least squares
- floating point
- arithmetic operations
- single chip
- dimensionality reduction
- computer architecture
- real time
- industry standard
- fpga implementation
- dimension reduction
- principal component analysis
- singular values
- error detection
- high end
- feature extraction
- face recognition
- image processing
- information retrieval
- data sets
- database
- floating point arithmetic