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A 9.1-ENOB 6-mW 10-Bit 500-MS/s Pipelined-SAR ADC With Current-Mode Residue Processing in 28-nm CMOS.
Kyoung-Jun Moon
Dong-Shin Jo
Wan Kim
Michael Choi
Hyung-Jong Ko
Seung-Tak Ryu
Published in:
IEEE J. Solid State Circuits (2019)
Keyphrases
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power consumption
analog to digital converter
power supply
real time
low power
hd video
nm technology
high speed
low voltage
low cost
data processing
data flow
parallel architecture
synthetic aperture radar
high density