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Hiding Synchronization Delays in a GALS Processor Microarchitecture.
Greg Semeraro
David H. Albonesi
Grigorios Magklis
Michael L. Scott
Steven G. Dropsho
Sandhya Dwarkadas
Published in:
ASYNC (2004)
Keyphrases
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early stage
parallel processing
high speed
single chip
computer architecture
circuit design
database
information retrieval
multi core processors
multiprocessor systems
round trip
low power
instruction set
industry standard