Parallel Memory Architecture for Arbitrary Stride Accesses.
Eero AhoJarno VanneTimo D. HämäläinenPublished in: DDECS (2006)
Keyphrases
- memory access
- level parallelism
- processing elements
- shared memory
- multithreading
- parallel architecture
- associative memory
- multi threaded
- multi processor
- parallel hardware
- parallel processing
- computational power
- distributed memory
- random access
- computing power
- memory hierarchy
- parallel implementation
- memory bandwidth
- main memory
- software architecture
- management system
- master slave
- neural network
- distributed shared memory
- distributed processing
- processing units
- real time
- memory management
- parallel computers
- multi core processors
- design considerations
- memory size
- instruction set
- memory usage
- access patterns
- hardware implementation
- message passing