Design of a True Random Number Generator Based on Low Power Oscillator with Increased Jitter.
Mariusz DerleckiKrzysztof SiwiecPawel NarczykWitold A. PleskaczPublished in: DDECS (2019)
Keyphrases
- low power
- single chip
- high speed
- low power consumption
- power consumption
- logic circuits
- low cost
- vlsi architecture
- digital signal processing
- power dissipation
- mixed signal
- random number generator
- high power
- design methodology
- gate array
- wireless transmission
- ultra low power
- vlsi circuits
- cmos technology
- low complexity
- lightweight
- real time