Reconfigurable Instruction Decoding for a Wide-Control-Word Processor.

Alen Bardizbanyan Magnus Själander Per Larsson-Edefors

Published in: IPDPS Workshops (2011)

Keyphrases

instruction set
control system
low cost
systolic array
co occurrence
level parallelism
high speed
real time
information retrieval
general purpose
control method
instructional design
decoding algorithm