Activity Estimation for Field-Programmable Gate Arrays.
Julien LamoureuxSteven J. E. WiltonPublished in: FPL (2006)
Keyphrases
- field programmable gate array
- hardware implementation
- programmable logic
- embedded systems
- parallel architectures
- massively parallel
- parallel computing
- digital signal processing
- digital signal processors
- software implementation
- high end
- parallel programming
- hardware design
- image processing algorithms
- computing systems
- efficient implementation
- pairwise
- image processing
- transactional memory
- artificial intelligence