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A single chip iΔ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem.
Daejeong Kim
Jaejin Park
Sungjoon Kim
Deog-Kyoon Jeong
Wonchan Kim
Published in:
IEEE J. Solid State Circuits (1995)
Keyphrases
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single chip
low power
low cost
highly parallel
embedded processors
signal processor
image sensor
power consumption
cmos image sensor
image processing
real time
computer vision
high speed
digital camera