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Design considerations for a 25-nanosecond tunnel diode memory.
David J. Crawford
R. L. Moore
J. A. Parisi
J. K. Picciano
W. David Pricer
Published in:
AFIPS Fall Joint Computing Conference (1) (1965)
Keyphrases
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design considerations
tunnel diode
random access memory
memory space
low voltage
transmission line
neural network
main memory
memory requirements
logic circuits
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