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Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFET.

Danny LuuLukas KullThomas ToiflChristian MenolfiMatthias BraendliPier Andrea FranceseThomas MorfMarcel A. KosselHazar YuekselAlessandro CevreroIlter ÖzkayaQiuting Huang
Published in: ESSCIRC (2017)
Keyphrases
  • analog to digital converter
  • synthetic aperture radar
  • camera calibration
  • single chip
  • high speed
  • low cost
  • multi view
  • missing data
  • power consumption
  • circuit design
  • delay insensitive
  • sigma delta