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Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors.

Lei JiangBo ZhaoYoutao ZhangJun Yang
Published in: DAC (2012)
Keyphrases
  • embedded processors
  • single chip
  • parallel implementation
  • design considerations
  • hardware and software
  • low cost
  • machine vision
  • optical flow
  • low power