Login / Signup
FPGA implementation of a Cholesky algorithm for a shared-memory multiprocessor architecture.
Satchidanand G. Haridas
Sotirios G. Ziavras
Published in:
Parallel Algorithms Appl. (2004)
Keyphrases
</>
fpga implementation
multiprocessor architecture
shared memory
image processing algorithms
post processing
gene expression programming
probabilistic model
preprocessing
input data
real time
matching algorithm
message passing
np hard
parallel computation
image sequences
image processing
knowledge base