Login / Signup
A Novel Scan-In Scheme for CMOS/ReRAM Programmable Logic Circuits.
Md Musabbir Adnan
Sherif Amer
Garrett S. Rose
Published in:
ISCAS (2018)
Keyphrases
</>
logic circuits
low power
low cost
single chip
high speed
power consumption
tunnel diode
functional decomposition
logic synthesis
real time
dynamic programming
gate array
power dissipation
power supply
transmission line
efficient implementation
hidden markov models
pattern recognition
image processing