Login / Signup

Neuromorphic LIF Row-by-Row Multiconvolution Processor for FPGA.

Ricardo Tapiador-MoralesAlejandro Linares-BarrancoAngel Jiménez-FernandezGabriel Jiménez-Moreno
Published in: IEEE Trans. Biomed. Circuits Syst. (2019)
Keyphrases
  • high speed
  • single chip
  • digital signal
  • systolic array
  • real time
  • data sets
  • low cost
  • high end
  • parallel architecture
  • functional verification