190-MHz CMOS 4-Kbyte Pipelined Caches.
Apoorv SrivastavaYong-Seon KohBarton SanoAlvin M. DespainPublished in: ISCAS (1995)
Keyphrases
- high speed
- cmos technology
- nm technology
- low power
- power consumption
- parallel processing
- low voltage
- power supply
- low cost
- data flow
- circuit design
- delay insensitive
- network load
- parallel architecture
- analog vlsi
- focal plane
- power dissipation
- data sets
- high frequency
- caching scheme
- clock frequency
- single chip
- hd video
- data structure