A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier.
Chutham SawigunAndreas DemosthenousDipankar PalPublished in: ECCTD (2007)
Keyphrases
- mixed signal
- low power
- low voltage
- cmos technology
- vlsi circuits
- power consumption
- low cost
- high speed
- vlsi architecture
- low power consumption
- power management
- multi channel
- cmos image sensor
- single chip
- image sensor
- power dissipation
- digital signal processing
- design considerations
- analog to digital converter
- image processing
- delay insensitive
- digital circuits
- wireless sensor networks