Leakage Power Estimation for Deep Submicron Circuits in an ASIC Design Environment.

Rahul Kumar C. P. Ravikumar

Published in: VLSI Design (2002)

Keyphrases

circuit design
design methodology
chip design
power consumption
power dissipation
vlsi circuits
design process
real time
case study
high speed
single chip
integrated circuit
logic circuits
engineering design
low power
estimation algorithm
software environment
virtual world
mobile robot
high level synthesis