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A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning.

Jung Kuk KimPhil KnagThomas ChenZhengya Zhang
Published in: VLSIC (2015)
Keyphrases
  • event driven
  • object recognition
  • learning process
  • learning algorithm
  • high speed
  • visual recognition
  • object categorization
  • single chip
  • information delivery
  • visual object recognition
  • processor core