Memory-Efficient Dataflow Inference for Deep CNNs on FPGA.
Lucian PetricaTobias AlonsoMairin KroesNicholas J. FraserSorin CotofanaMichaela BlottPublished in: CoRR (2020)
Keyphrases
- memory efficient
- iterative deepening
- cellular neural networks
- external memory
- bayesian networks
- hardware implementation
- signal processing
- integral image
- multiple sequence alignment
- control flow
- high speed
- probabilistic inference
- data flow
- fpga implementation
- single chip
- inference process
- hardware design
- field programmable gate array
- parallel computing
- hardware architecture
- design methodology
- software implementation
- belief networks
- probabilistic model