An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme.
Kwanyeob ChaeJongRyun ChoiHyungkwon LeeJinho ChoiShinyoung YiYoonjee NamSangyun HwangJoohyung LeeWon LeeKihwan SeongJoohee ShinSoo-Min LeeSeokkyun KoJihun OhBilly KooSanghune ParkJongshin ShinHyungjong KoPublished in: VLSI Circuits (2019)