A Programmable 16-Lane SIMD ASIP for Massive MIMO.
Steffen MalkowskyHemanth PrabhuLiang LiuOve EdforsViktor ÖwallPublished in: ISCAS (2019)
Keyphrases
- processor array
- parallel algorithm
- parallel implementation
- massively parallel
- low cost
- detection algorithm
- data analysis
- mesh connected
- parallel processing
- traffic flow
- single chip
- fading channels
- lane detection
- mimo systems
- cdma systems
- real time
- general purpose
- highly parallel
- multiple input
- array processor
- transmission scheme
- single instruction multiple data
- digital signal processors
- mimo ofdm
- lane departure
- intelligent vehicles
- parallel computers
- parallel computing
- communication systems
- computer simulation
- distributed systems