A 2.1 mW 2 MHz-BW 73.8 dB-SNDR Buffer-Embedded Noise-Shaping SAR ADC.

Taewoong Kim Youngcheol Chae

Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2021)

Keyphrases

noise shaping
delta sigma
analog to digital converter
image coding
high speed
power consumption
error diffusion
embedded systems
maximum likelihood
image reconstruction
signal processing
gray scale
high frequency
sar images
image sensor
clock frequency