Ultra Low Power CMOS PLL Clock Synthesizer for Wireless Sensor Nodes.
Adnan GundelWilliam N. CarrPublished in: ISCAS (2007)
Keyphrases
- ultra low power
- wireless sensor nodes
- low power
- power consumption
- wireless sensor networks
- high speed
- sensor networks
- wireless communication
- resource constrained
- sensor nodes
- text to speech
- base station
- low cost
- single chip
- delay insensitive
- cmos technology
- energy consumption
- real time
- data collection
- duty cycle
- power dissipation
- routing algorithm
- signal to noise ratio
- distributed environment
- image sensor
- resource constraints
- control signals
- routing protocol
- wireless networks
- lightweight
- computer systems