A Clockless ADC/DSP/DAC System with Activity-Dependent Power Dissipation and No Aliasing.
Bob SchellYannis P. TsividisPublished in: ISSCC (2008)
Keyphrases
- digital signal processing
- power dissipation
- low power
- power consumption
- signal processing
- data flow
- high speed
- computer vision and image processing
- image processing
- cmos technology
- power reduction
- logic circuits
- nm technology
- field programmable gate array
- low cost
- chip design
- super resolution
- hidden markov models
- neural network