HW/SW codesign techniques for dynamically reconfigurable architectures.

Juanjo Noguera Rosa M. Badia

Published in: IEEE Trans. Very Large Scale Integr. Syst. (2002)

Keyphrases

hw sw
hardware software
embedded systems
design methodology
multi core processors
hardware software partitioning
hardware and software
low cost
field programmable gate array
real time
neural network
case study
fault tolerant
parallel architectures