Secure Dual-Core Cryptoprocessor for Pairings Over Barreto-Naehrig Curves on FPGA Platform.
Santosh GhoshDebdeep MukhopadhyayDipanwita Roy ChowdhuryPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2013)
Keyphrases
- real time
- reconfigurable hardware
- low cost
- hardware implementation
- field programmable gate array
- parallel architecture
- signal processing
- primal dual
- curve matching
- closed curves
- fpga implementation
- real time image processing
- covert channel
- parallel hardware
- hardware design
- b spline
- high speed
- image processing
- software implementation
- planar curves
- security requirements