Two-dimensional signal gating for low-power array multiplier design.

Zhijun Huang Milos D. Ercegovac

Published in: ISCAS (1) (2002)

Keyphrases

low power
power consumption
single chip
vlsi architecture
low cost
low power consumption
logic circuits
high speed
digital signal processing
cmos technology
gate array
power dissipation
mixed signal
high power
image sensor
embedded systems
low complexity
high frequency
design process
signal processing
vlsi circuits