Trading-Off Error Detection Efficiency with Implementation Cost for Sequential Circuits Implemented with FPGAs.
Grzegorz BorowikAndrzej KrasniewskiPublished in: EUROCAST (2) (2011)
Keyphrases
- error detection
- error correction
- reconfigurable hardware
- hardware software
- circuit design
- data cleansing
- cost reduction
- metadata
- error recovery
- error correcting
- efficient implementation
- fault tolerance
- hardware implementation
- smart camera
- power consumption
- parallel version
- multi agent systems
- neural network
- fault isolation