MTCMOS low-power design technique (LPDT) for low-voltage pipelined microprocessor circuits.
C. B. HsuJames B. KuoPublished in: ISIC (2014)
Keyphrases
- cmos technology
- low power
- low voltage
- high speed
- mixed signal
- logic circuits
- power consumption
- power dissipation
- low cost
- single chip
- vlsi circuits
- vlsi architecture
- low power consumption
- circuit design
- multi channel
- parallel processing
- power reduction
- chip design
- digital signal processing
- power line
- delay insensitive
- gate array
- real time
- random access memory
- image sensor
- image sequences