Low-power floating bitline 8-T SRAM design with write assistant circuits.
Hao-I YangSsu-Yun LaiWei HwangPublished in: SoCC (2008)
Keyphrases
- low power
- logic circuits
- cmos technology
- power consumption
- high speed
- power dissipation
- power reduction
- single chip
- mixed signal
- low cost
- low power consumption
- vlsi architecture
- vlsi circuits
- digital signal processing
- high power
- gate array
- delay insensitive
- ultra low power
- image sensor
- hardware and software
- signal processing
- real time
- nm technology
- shared memory
- multi channel
- cmos image sensor