A 2.5-V, 12-b, 5-MSample/s pipelined CMOS ADC.
Paul C. YuHae-Seung LeePublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- analog to digital converter
- single chip
- image sensor
- high speed
- low power
- low cost
- power consumption
- data flow
- sigma delta
- circuit design
- vlsi circuits
- delay insensitive
- cmos image sensor
- low voltage
- analog vlsi
- focal plane
- database
- wide dynamic range
- rolling shutter
- power supply
- hd video
- power dissipation
- control system
- search engine
- genetic algorithm
- neural network
- data sets
- real time