A built-in calibration system with a reduced FFT engine for linearity optimization of low power LNA.
Yongsuk ChoiChun-hsiang ChangIn-Seok JungMarvin OnabajoYong-Bin KimPublished in: DFT (2014)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- single chip
- high power
- vlsi architecture
- low power consumption
- logic circuits
- frequency domain
- vlsi circuits
- wireless transmission
- cmos technology
- gate array
- image sensor
- mixed signal
- digital signal processing
- fourier transform
- computer vision
- delay insensitive
- ultra low power