An Asynchronous FPGA Block with Its Tech-Mapping Algorithm Dedicated to Security Applications.
Taha BeyrouthyLaurent FesquetPublished in: Int. J. Reconfigurable Comput. (2013)
Keyphrases
- experimental evaluation
- computational complexity
- detection algorithm
- search space
- worst case
- recognition algorithm
- intrusion detection
- significant improvement
- np hard
- dynamic programming
- computational cost
- high accuracy
- learning algorithm
- hardware architecture
- hardware implementation
- preprocessing
- optimal solution
- objective function
- simulated annealing
- segmentation algorithm
- search algorithm
- information security
- convergence rate
- block matching
- mapping function
- neural network
- fpga implementation