A tamper resistant hardware accelerator for RSA cryptographic applications.
Giacinto Paolo SaggeseLuigi RomanoNicola MazzoccaAntonino MazzeoPublished in: J. Syst. Archit. (2004)
Keyphrases
- random number generator
- public key cryptography
- field programmable gate array
- digital signature
- low cost
- cryptographic algorithms
- hardware and software
- elliptic curve cryptography
- smart card
- public key
- random number
- real time
- protection schemes
- vlsi implementation
- elliptic curve
- security protocols
- image processing
- computing power
- computer systems
- hardware implementation
- computing systems
- key management
- advanced encryption standard
- secure communication
- circuit design
- key exchange
- massively parallel
- parallel implementation
- compute intensive
- modular exponentiation
- computer architecture
- private key
- hardware architecture