Implementation of Low Power Digital Multipliers using 10 -Transistor Adder Blocks.
Dhireesha KudithipudiEugene JohnPublished in: J. Low Power Electron. (2005)
Keyphrases
- low power
- power dissipation
- mixed signal
- high speed
- power consumption
- low cost
- logic circuits
- cmos technology
- vlsi architecture
- single chip
- vlsi circuits
- signal processor
- circuit design
- high power
- ultra low power
- wireless transmission
- digital signal processing
- power reduction
- cmos image sensor
- low power consumption
- image sensor
- general purpose
- gate array