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A 4-to-1 240 Gb/s PAM-4 MUX with a 7-tap Mixed-Signal FFE in 55nm BiCMOS.

Michiel VerplaetseHannes RamonNishant SinghBart MoeneclaeyPeter OssieurGuy Torfs
Published in: CICC (2021)
Keyphrases
  • mixed signal
  • cmos technology
  • low power
  • high speed
  • vlsi circuits
  • multi channel
  • power consumption
  • low voltage
  • parallel processing
  • low cost
  • power dissipation
  • digital circuits
  • digital signal processing
  • image sensor