An enhanced iterative improvement method for evaluating the maximum number of simultaneous switching gates for combinational circuits.
Kai ZhangHaruhiko TakaseTerumine HayashiHidehiko KitaPublished in: ASP-DAC (1997)
Keyphrases
- maximum number
- cost function
- significant improvement
- experimental evaluation
- pairwise
- synthetic data
- high precision
- high accuracy
- clustering method
- support vector machine svm
- theoretical analysis
- detection method
- similarity measure
- mutual information
- dynamic programming
- prior knowledge
- iterative process
- segmentation method
- classification method
- fully automatic
- maximum likelihood
- image restoration
- computationally efficient
- model selection
- input data
- classification accuracy
- probabilistic model
- computational cost
- feature vectors
- objective function