Topology-aware floorplanning for 3D application-specific Network-on-Chip synthesis.

Bo Huang Song Chen Wei Zhong Takeshi Yoshimura

Published in: ISCAS (2013)

Keyphrases

application specific
network on chip
general purpose
routing algorithm
interconnection networks
network simulator
multi processor
computation intensive
file system
data transfer
shortest path
fault tolerant
ad hoc networks
wireless networks
message passing